1. Field of the Invention
The present invention relates to a frequency synthesizer utilizing a current mirror circuit which comprises, on the one hand, a control branch which includes in a series combination between a power supply terminal and a reference voltage terminal
a control current source which may adopt two states, the first of which corresponding to a current value called nominal value and the second corresponding to a low current value or zero value, PA1 the main current path of at least one transistor, PA1 and a first balance resistor,
and on the other hand, an output branch which comprises a second transistor, provided for producing a current whose value has a predetermined relation with the control current, and whose reference electrode is connected to the reference voltage terminal through a second balance resistor, the control electrode of the first and that of the second transistor being interconnected and biased with the control current.
2. Description of the Related Art
Frequency synthesizers utilizing a phase locked loop are widely used, especially for channel selection in radio-frequency transmission apparatus. An embodiment of a frequency synthesizer is described in U.S. Pat. No. 4,745,372. A mobile radio set may comprise such a synthesizer.
One of the various kinds of frequency synthesizer uses a circuit called charge pump which employs at least one current mirror circuit. There are a variety of embodiments of current mirror circuits of which the most simple is constituted by only two transistors, the transistor of the control branch being arranged as a diode. Another likewise well-known form uses three transistors, the common junction of the bases of the first and second transistors being fed by means of a third transistor, arranged as an amplifier, in the control branch of the current mirror circuit to supply power to the bases of the current mirror circuit.
According to either of these two simple embodiments, the output current of the current mirror circuit has a decay time which is relatively slow in its final portion, when the control current of the current mirror circuit is changed over from its nominal value to a zero value. This phenomenon is basically due to the discharging of the stray capacitance of the circuit, for example, that of the control current source. This discharging is effected across a base-emitter diode of a bipolar transistor or through the channel resistor of a field effect transistor whose impedance increases as the discharge current diminishes.
With respect to the charge pump circuit, it is known to be realised with two similarly constructed current sources and the current of one of them is applied to the capacitor after inversion by a current mirror circuit. When the charge voltage of the capacitor is stabilized, the algebraic sum of the currents supplied to the capacitor by the two switchable power sources is to be near to zero and the slowing down effect mentioned above, caused by the current mirror circuit, thus presents a major inconvenience to the stability of the charge voltage of the capacitor. This fault becomes manifest in a cyclic voltage variation which is equivalent to excessive noise in the phase locked control circuit.